- Edited
Hello CIrcuit Dojo Community,
I am new to setting up SPI peripherals, and in the process of moving an accelerometer from I2C bus to SPI bus. What if any are typical sizes for SPI RX and TX buffers? Are these generally the size of or a bit larger than the longest byte array to write, and to read back respectively?
Curious as well, I’m writing code which builds against Zephyr 3.2.0, which of course provides a hardware abstracted API to the SPI interface of a given, supported board. I see that SPI peripherals often utilize Direct Memory Access controllers. From those of you with Zephyr and SPI experience, are SPI related DMA channels generally already called out in SoC device tree files, or board level dts? And if yes, is this sufficient to provide the configuration of those DMA channels without our writing additional code to do so?
I am searching for sample apps among Zephyr’s samples sub-directories.
I’m also reviewing Zephyr’s spi_bitbang project. Haven’t found clear answers yet and figure it may be wise to ask for some help from more experienced developers.
- Ted